Method and device for loading instruction codes to a memory and linking said instruction codes
US6496910B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1999 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Jun 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07F7/084
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A method for loading instruction codes to a first memory and linking said instruction codes is proposed, whereby at least one instruction code has as parameter an address which during a loading step is not determined. This address-parametered instruction code has assigned thereto an address place. A relocation information is loaded which during a linking step effects that the address becomes determined using a starting address and a relative address offset. The then determined address is put at the address place. During the loading step, directly after loading each address-parametered instruction code with its address place, the relocation information is loaded and the address is determined in the linking step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.