Apparatus and method for reducing power consumption in an electronic data storage system
US6496915B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 1999 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Dec 31, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a system for minimizing a power consumption level of a memory data storage device that operates in a high power mode when data is being written therein and operates in a low power mode when inactive. The system comprises: 1) a controller for receiving incoming data to be written to the memory data storage device; and 2) a first low power buffer coupled to the controller. The controller stores the incoming data in the first low power buffer until a predetermined amount of incoming data has been accumulated in the first low power buffer and transfers the accumulated predetermined amount of incoming data to the memory data storage device in a single data transfer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.