Circuit for testing an integrated circuit
US6498507B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2000 |
| Grant date | Dec 24, 2002 |
| Priority date | — |
| Expiry date | Apr 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2851
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit used for testing an integrated circuit including a chop circuit. A source of a test signal coupled to a first pair of pins of the integrated circuit. A test signal measuring device to measure the test signal coupled to a second pair of pins of the integrated circuit. A chop circuit controller produces a control signal and for feeding such control to the chop circuit and the test signal measuring device. In response to the control signal, the chop circuit couples the first pair of pins to the second pair of pins with a first polarity during a first period of time and couples the first pair of pins to the second pair of pins with an opposite polarity during a second period of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.