Addressable fuse array for circuits and mechanical devices
US6501107B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1999 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Dec 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A fuse array having a plurality of fusible links that can be addressed by two electrodes is disclosed. The fuse array includes two conductive strips having the plurality of fusible links located therebetween and electrically coupled to the conductive strips. The fusible links have different electrical resistance and each fusible link includes a fuse portion. A voltage potential applied across the conductive strips induces current flow through the fusible links in accordance with Ohm's law and ohmic heating occurs at the fuse portion in proportion to the square of the current. The voltage is increased to cause sufficient ohmic heating to occur in the most conductive fusible link (the fusible link having the lowest electrical resistance) so that the fuse portion in that fusible link fuses. Because the fusible links are connected in parallel to the conductive strips, an equivalent resistance of the plurality of fusible links increases and the current flow diminishes so that no further fuse portions are fused at the selected voltage level. Thereafter, the voltage level may be increased to fuse the most conductive fusible link remaining that is not fused. The fuse array may be incorpora…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.