Integrated capacitor with a mixed dielectric
US6501151B1 · kind B1 · utility
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2References
11Claims
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Assignee
Inventors
Key dates
| Filing date | Nov 15, 2000 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Nov 15, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02183
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit capacitor includes a substrate, a first metal electrode on the substrate, and a dielectric layer on the first metal electrode. The dielectric layer includes a homogeneous combination of at least two dielectric materials having permittivities varying in an opposite way based upon an electric field, with a proportion of each dielectric material being chosen so that the integrated circuit capacitor has a desired voltage linearity. A second metal electrode is on the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.