Flip chip package with improved cap design and process for making thereof
US6501171B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2001 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Jan 30, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Wire bond packages which mount encapsulated semiconductor chips, such as plastic ball grid array (PBGA) packages providing for the mounting of so-called flip-chips. The chips are overlaid with heat spreading perforated cap wherein the perforations are filled with an adhesive to prevent delamination caused by mismatches in the coefficients of thermal expansion, resulting in contractions which cause the entire package arrangement to warp, leading to delamination between an encapsulant and cap and resulting in failure of connect joints and the ball grid arrays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.