Semiconductor integrated circuit
US6501303B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2000 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Sep 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/302
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A determining circuit comprises an input section having a P-channel type MOS transistor applied with a voltage VT set based on a reference voltage applied to a gate electrode and a voltage according to a voltage of a terminal applied to a source electrode, and an output section with a voltage level that changes according to an output from a drain electrode of a P-channel-type MOS transistor of a voltage level that changes according to a further voltage. With this configuration, the determining circuit for determining switching over to a prescribed mode can be implemented which is not influenced by fluctuations in process factors by using the voltage outputted from the output section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.