Producing smoothed clock and data signals from gapped clock and data signals
US6501809B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1999 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Mar 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0632
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A clock smoothing circuit generates a smoothed clock signal from a gapped clock signal having unevenly spaced pulses separated by gaps that result from the removal of data bits and from a reference clock signal having evenly spaced pulses that create a predetermined reference frequency. A smoothing element is coupled to the input elements to receive the gapped clock signal and the reference clock signal. In one embodiment, the smoothing element generates a smoothed clock signal having one pulse for each of the pulses in the gapped clock signal and having a frequency that is greater than one-half of the predetermined reference frequency. Each pulse in the smoothed clock signal is synchronized with a pulse in the reference clock signal. In another embodiment, the smoothing element includes an accumulator that counts the pulses of the reference clock signal, a modulo signal that resets the accumulator to a particular reset value when a predetermined number of pulses M is reached, and an output element that produces one pulse of the smoothed clock signal for each pulse of the reference clock signal on which the modulo element does not reset the accumulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.