Method and apparatus for providing a general purpose stack
US6502184B1 · kind B1 · utility
5Cited by
0References
46Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 2, 1998 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Dec 31, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing a stack in a processor-based system. In one embodiment, the apparatus comprises a memory for storing instruction sequences by which the processor-based system is processed; and a processor coupled to the memory that executes the stored instruction sequences, where the processor has a plurality of registers. The stored instruction sequences cause the processor to: (a) determine a condition of occupancy of the plurality of registers; and (b) rearrange the contents of each of the plurality of registers in accordance with a predetermined order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.