Integrated circuit chip carrier assembly
US6503821B2 · kind B2 · utility
17Cited by
1References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2001 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Dec 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit chip carrier assembly is provided by joining a substrate having electrically conductive regions on at least one major surface thereof to a stiffener by a bonding film. The bonding film comprises a dielectric substrate having a thermoset adhesive on both of its major surfaces. The thermoset adhesive prior to the bonding is a B-stage adhesive, is tack-free at normal room temperatures and is solvent free.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.