Passivation layer and process for semiconductor devices
US6504235B2 · kind B2 · utility
58Cited by
21References
10Claims
0Family size
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Key dates
| Filing date | Jun 6, 2001 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Jun 13, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor passivation technique uses a plasma enhanced chemical vapor deposition (PECVD) process to produce a silicon-rich nitride film as a passivation layer on a Group III-V semiconductor device. The silicon-rich film has a nitrogen to silicon ratio of about 0.7, has a relatively high index of refraction of, for example, approximately 2.4, is compressively stressed, and is very low in hydrogen and oxygen content.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.