Data processor
US6505295B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 1999 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Aug 16, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/325
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To provide a data processing apparatus equipped with a control means to reduce the power required for memory accessing, in spite of the unavailability of a repeat instruction, by reading instructions reiteratively from a small scale buffer in loop processing. Also to provide a data processing apparatus equipped with a means to opt to apply, or not to apply, control to read instructions, that have to be executed reiteratively in loop processing, out of a small scale buffer reiteratively.If, as a result of execution of an instruction to alter the content of a certain register prior to a series of instructions to be executed reiteratively, the register satisfies a specific condition, the series of instructions to be executed repeatedly are read out of a small scale buffer reiteratively.A data processing apparatus equipped with a control means to reduce the power required for memory accessing, in spite of the unavailability of a repeat instruction, by reading instructions reiteratively from a small scale buffer in loop processing can be provided. Also a data processing apparatus equipped with a means to opt to apply, or not to apply, control to read instructions, that have to be execut…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.