Method for storing multiple levels of design data in a common database
US6505328B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 1999 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Apr 27, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An automated logic circuit design system uses a common database to store design data at different states of the design process, including data-flow graphs, netlists and layout descriptions. In this way, the need to translate circuit descriptions between tools is eliminated, thus leading to increased speed, flexibility and integration. The common database includes entities, models, cells, pins, busses and nets. The data-flow graphs are stored as graphs, the nodes in a graph as cells, and the edges as busses. Physical design data is available by storing the cells in a model in a KD tree. This allows queries on cells in the netlist located in the layout within arbitrary areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.