Active timing arbitration in superconductor digital circuits
US6507234B1 · kind B1 · utility
29Cited by
1References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Jan 14, 2003 |
| Priority date | — |
| Expiry date | Nov 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/92
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A superconductor circuit (50) for providing active timing arbitration between SFQ pulses. The superconductor circuit (50) includes a first superconducting transmission line (52) having at least one inductor (54) for transmitting first input pulses, and a second superconducting transmission line (62) having at least one inductor (64) for transmitting second input pulses that are correlated to the first input pulses. The first and second superconducting transmission lines (52, 62) are coupled together in order to generate a flux attraction between the first and second input pulses for reducing relative timing uncertainty.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.