Method of fabricating an integrated optical component
US6509139B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2000 |
| Grant date | Jan 21, 2003 |
| Priority date | — |
| Expiry date | Nov 10, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12097
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating an integrated optical component on a silicon-on insulator chip comprising a silicon layer (1) separated from a substrate (2) by an insulating layer (3), the component having a first set of features, eg a rib waveguide (5) at a first level in the silicon layer (1) adjacent the insulating layer (3) and a second set of features, eg a triangular section (5B) at a second level in the silicon layer (1) further from the insulating layer (3), the method comprising the steps of:selecting a silicon-on-insulator chip having a silicon layer (1) of sufficient thickness for the first set of features;fabricating the first set of features in the silicon layer (1) at a first level in the silicon layer;increasing the thickness of the silicon layer (1) in selected areas to form a second level of the silicon layer (1) over part of the first level; and thenfabricating the second set of features at the second level in the silicon layer (1).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.