Memory cell with increased capacitance
US6510075B2 · kind B2 · utility
5Cited by
4References
12Claims
0Family size
Inventor
Key dates
| Filing date | May 14, 2001 |
| Grant date | Jan 21, 2003 |
| Priority date | — |
| Expiry date | May 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/05
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell having first and second access transistors coupled to a storage transistor is disclosed. The storage transistor comprises a gate oxide formed from a material having a high dielectric constant to increase the capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.