Voltage-level shifter and semiconductor memory using the same
US6510089B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2002 |
| Grant date | Jan 21, 2003 |
| Priority date | — |
| Expiry date | Jul 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A voltage-level shifter has a first and a second power supply terminal to which a first and a second potential are supplied, respectively, the second potential being lower than the first potential; a first input terminal to which a first input signal is supplied, the first input signal having a high and a low level according to the first and the second potentials; a second input terminal to which a second input signal is supplied, the second input signal being an inverted signal of the first input signal. The voltage-level shifter also has a first PMOS transistor having a source connected to the first power supply terminal, a gate connected to the first input terminal, and a drain connected to a first output terminal for outputting a first output signal; a second PMOS transistor having a source connected to the first power supply terminal, a gate connected to the second input terminal, and a drain connected to a second output terminal for outputting a second output signal that is an inverted signal of the first output signal; a first NMOS transistor having a drain connected to the first output terminal and a gate connected to the first input terminal; a second NMOS transistor havin…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.