Variable-bit-rate coding apparatus
US6510176B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1999 |
| Grant date | Jan 21, 2003 |
| Priority date | — |
| Expiry date | Sep 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/15
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A cumulative error D is calculated by sequentially adding up errors, each representing a difference between a given average target number Ba and a number Bg of bits generated during every predetermined period of a coded bit stream. In determining a number Bt of bits allocated to a compression coder, a provisionally allocated bit number Bst is preset based on a coding complexity X such that a number of bits allocated to a scene with a high coding complexity exceeds the average target number Ba as for a frame just after the change of scenes. And if the cumulative error D exceeds a predetermined value, the provisionally allocated bit number Bst is corrected in accordance with the magnitude of the cumulative error D so as to be reducible to, but not less than, the average target number Ba. As for frames within the same scene on the other hand, a previously allocated bit number Bt is sequentially updated such that the cumulative error D does not exceed a predetermined maximum value Dmax. Accordingly, even if a series of scenes with high coding complexities X appear consecutively, a number Bt of bits allocated to each of these scenes can always be at least equal to the average target num…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.