Cathode burn-in procedures for a field emission display that avoid display non-uniformities
US6512335B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2001 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Jun 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2209/0223
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Methods for performing cathode burn-in with respect to an FED display that avoid display non-uniformities near and around the spacer wall structures. In a first method, the anode is floated or receives a negative voltage with respect to the electron emitter. A positive voltage is then applied to the focus waffle structure with respect to the electron emitter. The cathode is then energized thereby preventing emitted electrons from escaping the focus well. Under these conditions, cathode burn-in conditioning can occur but electrons are energetically forbidden from hitting the anode or the spacer walls except for a small region near the focus waffle. Under the second method, the anode is grounded or allowed to float. A negative bias is applied to the focus waffle. This causes electrons to be collected at the M2 layer of the gate. Electrons are energetically forbidden from hitting any portion of the tube except the M2 layer. Under either method, no electrons hit the spacer walls and therefore display non-uniformities near and around the spacer wall structures are avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.