Volume rendering integrated circuit
US6512517B1 · kind B1 · utility
38Cited by
6References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 1999 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | May 20, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2200/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A volume rendering integrated circuit includes a plurality of interconnected pipelines having stages operating in parallel. The stages of the pipelines are interconnected in a ring, with data being passed in only one direction around the ring. The volume integrated circuit also includes a render controller for controlling the flow of volume data to and from the pipelines and for controlling rendering operations of the pipelines. The integrated circuit may further include interfaces for coupling the integrated circuit to various storage devices and to a host computer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.