Image scanning circuitry with row and column addressing for use in electronic cameras
US6512858B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 1998 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Jul 21, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/7795
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A scanning circuit for use with an active pixel sensor array comprises a row-address generator configured to start at a selected row-start address, stop at a selected row-stop address, and increment row addresses by a factor K. A column-address generator is configured to start at a selected column-start address, stop at a selected column stop address, and increment column addresses by a factor K. Circuitry is coupled to the row address generator and the column address generator, for storing the row-start address, the row-stop address, the column-start address, the column-stop address and the factor K. A row decoder is coupled to the row-address generator and a column selector is coupled to the column-address generator. A plurality of row select lines are coupled to the row decoder, each one of the row select lines associated with a different row in the active pixel sensor array. A plurality of column output lines are coupled to the column selector, each one of the column output lines associated with a different column in the active pixel sensor array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.