Network interface card accessible during low power consumption mode
US6513128B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 1999 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Nov 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention allows NIC resources to be accessed through auxiliary power and an ASIC clock while the PC is powered down and while PCI power and the PCI clock are not available. The present invention also provides an alternate path for accessing the NIC registers, downloading keep-alive and alert-on-LAN packets to the transmit packet buffer (TPB), as well as uploading received packets from the receive packet buffer (RPB). The present invention also allows monitoring PCI activity and seamlessly servicing the PCI configuration cycle (when PCI power and the PCI clock are restored) in conjunction with responding to the access through the alternate path (while PCI power and the PCI clock are not available).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.