Component and method for manufacture
US6514789B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 1999 |
| Grant date | Feb 4, 2003 |
| Priority date | — |
| Expiry date | Oct 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A component (10) includes a substrate (15), a cap wafer (23), and a protection layer (28) formed over a surface of the cap wafer (23). Together, the protection layer (28) and the cap wafer (23) form a cap structure (39) that is bonded to the substrate (15) via a bonding layer (33). An opening (47) is formed in the cap wafer (23) by etching the cap wafer (23). The protection layer (28) provides protection during etching of the cap wafer (23) for the underlying bonding layer (33) and devices (11,12) formed in the substrate (15).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.