Patent · US Expired

Multichip configuration

US6515531B2 · kind B2 · utility

6Cited by

4References

6Claims

0Family size

Assignee

Europaische Gesellschaft fur Leistungshalbleiter mbH · DE

Inventors

Martin Ruff · Vaterstetten, DE
Benno Weis · Hemhofen, DE

Key dates

Filing date	Jun 28, 2001
Grant date	Feb 4, 2003
Priority date	—
Expiry date	Jun 28, 2021

Classification

Technology area (CPC H)Electricity
CPC primaryH03K17/127
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A multichip configuration in which a plurality of semiconductor chips in a module are connected together in such a way that the voltage drop across internal gate resistors is minimized, in order in the event of a short circuit to prevent the short circuit current rising with the gate voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.