Ag-pre-plated lead frame for semiconductor package
US6518508B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 12, 2001 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Jun 12, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24917
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame for a semiconductor package includes a base metal layer made of copper (Cu), Cu alloy or iron-nickel (Fe-Ni) alloy, an underlying plating layer formed on at least one surface of the base metal layer and made of Ni or Ni alloy, an intermediate plating layer formed on the underlying plating layer to a thickness of about 0.00025 to about 0.1 &mgr;m (about 0.1 to about 4 microinches) and made of palladium (Pd) or Pd alloy, and an outer plating layer formed in the intermediate plating layer to a thickness of about 0.05 to about 0.75 &mgr;m (about 2 to 30 microinches) and made of silver (Ag) or Ag alloy. Since an Ag plated layer is formed as the outer plating layer, excellent oxidation resistance and corrosion resistance can be exhibited even under a high-temperature thermal condition, thereby improving wire bondability, solderability and good adhesion with epoxy for use in the semiconductor package, and preventing heel crack at a wire bonding portion. In particular, since thin layers of the Pd plated layer and Ag plated layer are used, Ag migration can be prevented. Also, the amount of a noble metal such as Pd or Ag can be greatly reduced, thereby attaining thin-film, light…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.