Circuit for compensating noise and errors from an output state of a digital amplifier
US6518838B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 2002 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Jan 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/331
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a digital amplifier of the PCM-UPWM type there is no negative feedback stage, which means that noise caused by the switching output stage of such an amplifier directly affects the audio signal. A regulation loop is inserted between the output and the input of the digital amplifier, the regulation loop being adapted to form a compensation signal c(k) which is multiplied by the audio signal to compensate noise and errors from the switching output stage. In an embodiment, the regulation loop consists of a multiplying D/A converter (2) which is adapted to multiply the compensation signal c(k) by a multiplicative error signal m(t), and a summation unit (3), by summation of the output of the multiplying D/A converter (2) and a reference voltage (6), forms a second error signal e(t) which is fed to a low-pass filter (4) that is fed to the input of an ADC circuit (5) to form the multiplicative error signal c(k), which, optionally via a second adaptation filter (21), is fed to a multiplier (11) and the multiplying D/A converter (2). Expediently, the circuit of the invention is formed in full or in part by an integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.