Method and apparatus for performing H-space bump mapping suitable for implementation with H-space lighting in a graphics pipeline of a computer graphics display system
US6518968B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2000 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | May 17, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method and apparatus for performing H-space bump mapping. The apparatus of the present invention is a fragment processor of a computer graphics display system. The method of the present invention is performed by the fragment processor. In accordance with the method of the present invention, for each vertex of each polygon being processed, the fragment processor calculates both diffuse and specular lighting terms. Then, for each fragment within the polygon defined by the vertices, the fragment processor interpolates the specular and diffuse lighting terms to obtain diffuse and specular lighting terms for each fragment. If bump mapping has been enabled, the fragment processor adds perturbations to the diffuse and specular lighting terms to generate the bump mapping. Preferably, prior to performing the H-space bump mapping algorithm, texture coordinate gradient vectors are calculated for the image to be rendered. During the H-space bump mapping algorithm of the present invention, the H-space reference vectors are aligned with the texture coordinate gradient vectors. The specular and diffuse lighting terms are calculated using the H-space reference vect…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.