Method and apparatus for high integrity hardware memory compression
US6519733B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2000 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Feb 23, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a processing system having a main memory, wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for providing compressed data integrity verification to insure detection of nearly any data corruption resulting from an anomaly anywhere in the logical processing or storage of compressed information. A cyclic redundancy code (CRC) is computed over a compressed data block as the data enters the compressor hardware, and the CRC is appended to the compressor output block before it is stored into the main memory. Subsequent read access results in comparing the CRC against a recomputation of the CRC as the block is uncompressed from the main memory. Any CRC miscompare implies an uncorrectable data error condition that may be used to interrupt the system operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.