Power decoupling circuit generating system and power decoupling circuit generating method
US6519741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2001 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Apr 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/0005
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a power decoupling circuit generating system and method capable of easily generating a power decoupling circuit for each device such as an LSI. On the basis of information regarding parameters of generating a power decoupling circuit held in a capacitor parts library and a line calculation parameter file, a power decoupling circuit of a &pgr;-type low pass filter construction having first and second decoupling capacitors to be added to a power supply terminal of a device as a target from which high frequency noise is prevented from being passed to a power plane and a power line corresponding to an inductance is automatically generated by a power decoupling circuit generating unit, thereby making calculation for generating the power decoupling circuit unnecessary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.