Semiconductor device and method of manufacturing the same
US6521933B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2000 |
| Grant date | Feb 18, 2003 |
| Priority date | — |
| Expiry date | Nov 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
In the drawn-out interconnection structure of the present invention, a storage node (SN) groove extending from a region, and a groove-shape drawn-out electrode is formed on the inner wall of storage node (SN) groove. An extended pad electrode portion extending from groove-shape drawn-out electrode is provided above storage node (SN) groove. Also provided is a contact plug that penetrates through extended pad electrode portion and that connects aluminum interconnection and extended pad electrode portion in a layer above extended pad electrode portion. With this arrangement, the structure of an interconnection drawn from an electrode of a semiconductor device can be obtained which allows the production of a cell transistor TEG capable of performing a reliable and stable measurement of the cell transistor characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.