Power amplifying transistors
US6522203B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2000 |
| Grant date | Feb 18, 2003 |
| Priority date | — |
| Expiry date | Sep 27, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an output stage of an electronic signal processing circuit such as that used for transmission from a mobile telephone set the amplifier circuit comprises two power transistors (A, B) or type FET. The power transistors are used for amplifying different signals such as signals for different wavelength bands in a duel band telephone set and they are not used simultaneously. Each power transistor comprises a multitude of elementary transistors (19, 21) or “fingers” which are interdigitated to form an interleaved configuration, the element transistors of one transistor alternating with the element transistors of the other transistor. Thereby the effective area which can receive heat dissipated by the element transistors will be twice that used when the element transistors are located in two geometrically separated groups which will allow a higher power load on each transistor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.