Unvalue-tagged memory without additional bits
US6523097B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2000 |
| Grant date | Feb 18, 2003 |
| Priority date | — |
| Expiry date | Oct 28, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49905
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided a method for representing unvalues in an unvalue-unaware memory of a computer processing system. The method includes the step of selecting arbitrary bit combinations to represent the unvalues, upon startup of the system. Upon performing a read operation from the memory, a read value is interpreted as an unvalue, when the read value matches at least one of the bit combinations. Upon performing a write operation to the memory, a value-unvalue-collision exception is raised, when a valid value is written to the memory and the valid value matches at least one of the bit combinations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.