Barrier layers ferroelectric memory devices
US6525357B1 · kind B1 · utility
5Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1999 |
| Grant date | Feb 25, 2003 |
| Priority date | — |
| Expiry date | Oct 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28568
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Unfavorable interactions of ferroelectric dielectric layers with silicon, intermetallic dielectrics, and other materials in metal-oxide semiconductor devices have discouraged the use of ferroelectric memory devices. This invention provides a zirconium titanate barrier layer with high insulating and low leakage characteristics. The barrier layer is not reactive with silicon or other materials used in metal-ferroelectric-semiconductor devices. These thermally stable layers should facilitate the integration of ferroelectric materials into memory and other semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.