Method and system for wide band decoupling of integrated circuits
US6525945B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2000 |
| Grant date | Feb 25, 2003 |
| Priority date | — |
| Expiry date | Aug 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10734
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An eletronic package comprising a printed circuit board on which are mounted a plurality of decoupling capacitors is disclosed. A carrier component electrically connects an integrated circuit to the printed circuit board through a plurality of solder balls. The plurality of solder balls comprises at least one solder ball for the integrated circuit ground voltage connection and at least one solder ball for the integrated circuit power voltage connection. The plurality of decoupling capacitors is organized as a set of ‘n’ capacitors ranged from a lower capacitor value Clow to a higher capacitor value Chigh such that the range Clow to Chigh of the ‘n’ capacitor values is a function of the frequency range Flow to Fhigh on which the integrated circuit operates. The number of decoupling capacitors is determined according to the free area on the surface of the printed circuit board, and the value of each consecutive capacitor value is a function of the previous capacitor value according to a multiplying factor of where
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.