Magnetic memory cell having magnetic flux wrapping around a bit line and method of manufacturing thereof
US6525957B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2001 |
| Grant date | Feb 25, 2003 |
| Priority date | — |
| Expiry date | Dec 21, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1655
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magneto-electronic component includes a first current line (120, 520, 620, 820) for generating a first magnetic field, a magnetic memory cell (140, 540, 640, 740, 840), and a second current line (170, 470) for generating a second magnetic field and substantially perpendicular to the first current line. The magnetic memory cell includes a multi-state memory layer having a structure adjacent to the first current line such that a magnetic flux emanating from the multi-state memory layer is substantially confined to wrap around the first current line. The second current line is located adjacent to a portion of the multi-state memory layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.