Synchronization device for a synchronous digital message transmission system and process for producing a synchronous output signal

US6526069B1 · kind B1 · utility

Assignee

• ALCATEL · FR

Inventors

• Michael Wolf · Mundelsheim, DE
• Geoffrey Dive · Aspach, DE

Key dates

• Filing date: Feb 4, 1999
• Grant date: Feb 25, 2003
• Expiry date: Feb 4, 2019

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S370/916
• WIPO field: Telecommunications
• WIPO sector: Electrical engineering

Abstract

A synchronization device for a synchronous digital message transmission system producing a synchronous output signal including successive transport modules synchronized to a frame clock from a digital input signal. The synchronization device includes a receiver unit for receiving the input signal, a packet assembly device for packaging the input signal into subassemblies of the transport modules, a buffer memory, a writer for writing data bits of the input signal out of the subassemblies into the buffer memory with a write clock, a reader, for reading data bits out of the buffer memory with a read clock in order to form the output signal, and a sending unit (SO) for sending synchronous output signals. The effective bit rate of the subassemblies compared to the standardized value is either lowered or raised by selecting the write clock lower than the read clock.