Protection of tungsten alignment mark for FeRAM processing
US6528386B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2002 |
| Grant date | Mar 4, 2003 |
| Priority date | — |
| Expiry date | Mar 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B53/30
Abstract
A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the patterning of a top electrode layer and a dielectric layer to form a capacitor stack structure having sidewalls associated therewith. Prior to patterning the bottom electrode layer, a protective film is formed on the sidewalls of the capacitor stack structure in order to protect the dielectric material from conductive contaminants associated with a subsequent patterning of the bottom electrode layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.