Ferroelectric memory and method for reading the same
US6529398B1 · kind B1 · utility
46Cited by
2References
22Claims
0Family size
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Key dates
| Filing date | Sep 27, 2001 |
| Grant date | Mar 4, 2003 |
| Priority date | — |
| Expiry date | Sep 27, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ferroelectric memory device and method for reading such a device utilize capacitive coupling between a reference circuit and a sense amplifier. The amount of sneak charge canceled from a data bit line depends on the relative capacitances of a coupling capacitor and another capacitor used to integrate sneak charge from a reference bit line. The use of linear-responding components improves stability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.