Acquisition of a spread-spectrum signal using counters
US6529546B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 13, 2001 |
| Grant date | Mar 4, 2003 |
| Priority date | — |
| Expiry date | Jul 8, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/708
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An improvement for obtaining synchronization to a chip-sequence signal. The chip-sequence signal has a plurality of chips, and is embedded in a spread-spectrum signal. A set of M shift registers stores a replica or delayed replica of the chip-sequence signal. Each shift register has a plurality of taps, which correspond to the plurality of chips. A plurality of comparators compares, with a delay of 1/M chip duration per shift register, the chip-sequence signal embedded in the spread-spectrum signal with the replica of the chip-sequence signal stored in the set of M shift registers. From the comparison, the plurality of comparators generates, for each tap of the shift register, a plurality of compared values at each comparator of the plurality of comparators. A plurality of counters up and down counts, from each comparator, a respective plurality of compared values. The respective plurality of compared values appears at an output of a respective comparator of the plurality of comparators. The plurality of counters thereby generates a plurality of totals, respectively. A selector device selects a value from the plurality of totals. The selected value may be, by way of example, a larg…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.