Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
US6531739B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Apr 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A method for eliminating the radiation-induced off-state current in the P-channel ultrathin silicon-on-sapphire transistor, by providing a retrograde dopant concentration profile that has the effect of moving the Fermi level at the back of the device away from that part of the bandgap where the interface states are located. When the Fermi level does not swing through this area in any region of operation of the device, subthreshold stretchout of the I-V curves does not occur.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.