High-speed bus capable of effectively suppressing a noise on a bus line
US6531901B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Mar 23, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4077
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high-speed bus includes a bus line to be connected with a bus driver and a bus receiver. Pull-up resistors are connected to both ends of the bus line for feeding a given pull-up electric potential thereto. A series resistor is further connected between the bus line and each of the bus driver and the bus receiver. The bus driver includes a series resistor and a capacitive component which are connected in series between the bus line and the ground. The bus receiver includes a waveform shaping component connected to the bus line for shaping a waveform of an inputted signal, and a receiver circuit receiving as an input thereof an output of the waveform shaping component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.