Delay systems and methods using a variable delay SINC filter
US6531906B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Dec 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delay system includes a first filter configured for receiving a selected input signal and a first mechanism for activating the first filter to produce a delayed output signal which is a function of a selected input signal. The delay system further includes a second filter configured for receiving a signal from said first filter to apply an additional delay to the signal received by said first filter, and a second mechanism for activating the second filter to produce a delayed signal which is a function of a signal received from the first filter. The delay system further comprises a divider system for tracking times from a clock reference. The delay system implements a method of delaying a received signal by sampling a selected signal with a predetermined clock signal and producing the selected signal at a time delayed to the extent of a comparison of a reduced frequency clock with a predetermined value. The method further includes further delaying production of the selected signal with a second comparison utilizing a second predetermined value of a further reduced frequency clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.