Load-generated drive, substantially no quiescent current, techniques and circuits for high speed switching of transistors
US6531909B1 · kind B1 · utility
2Cited by
9References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 15, 1999 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Sep 15, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques and circuits for high speed switching of transistors are provided. These techniques and circuits switch an output device while varying the drive current to the output device in proportion to the output current through the output device. In addition, these techniques and circuits provide a switching circuit with substantially no quiescent currents. This is accomplished by sampling the output current conducted by the output device and using the sample as a signal to drive either the output device fully ON or to switch the output device fully OFF.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.