Data message bit synchronization and local time correction methods and architectures
US6532251B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2001 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Aug 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/70706
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Methods and architectures for data message bit synchronization of a spread spectrum signal having a repeating sequence of pseudorandom code bits modulated with data message bits having a data bit time that is an integer number of a repeat time of the pseudorandom code bits. In one embodiment, an adjusted bit sync offset time is determined for each of a plurality of signals for which bit sync offset time is not known based on a corresponding clock error corrected propagation time for each signal, based on a known bit synch offset time and based on a clock error corrected propagation time of the signal for which bit synch offset time is known.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.