Asochronous centralized multi-channel DMA controller
US6532511B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1999 |
| Grant date | Mar 11, 2003 |
| Priority date | — |
| Expiry date | Sep 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic bridging device for transferring electronic data between a first device attached to a system bus and a peripheral device attached to a peripheral bus using a bridging circuit. The DMA controller comprises a system bus interface circuit for connecting the DMA controller to the system bus, a peripheral bus interface circuit for connecting the DMA controller to the peripheral bus, a data transfer request circuit for receiving data transfer requests from devices attached to the peripheral bus, and a control logic circuit for controlling the operation of DMA data transfer operations. Immediately upon receipt of one or more data transfer requests, the bridging device performs the following operations: requests access to the system bus, concatenates all pending peripheral bus data words into a single transfer, and transfers all pending requests across the bridging circuit. A corresponding method of transferring electronic data between a first device attached to a system bus and a peripheral device attached to a peripheral bus using a bridging circuit having a DMA controller is disclosed. The method comprises receiving one or more data transfer requests from devices attached …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.