Patent · US Expired

Timing driven interconnect analysis

US6532577B1 · kind B1 · utility

8Cited by

5References

30Claims

0Family size

Assignee

LSI Logic Corporation · US

Inventors

Benjamin Mbouombouo · San Jose, US
Johann Leyrer · Munich, DE
Human Boluki · Munich, DE

Key dates

Filing date	Jun 27, 2001
Grant date	Mar 11, 2003
Priority date	—
Expiry date	Jun 27, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/33
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for performing timing driven interconnect estimation analysis is disclosed. The method includes collecting data only from timing critical paths of at least one previous design, and generating statistical data based on a net length distribution of the timing critical paths. A wire load model is then generated for a new design from the statistical data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.