Duty cycle correction circuits that reduce distortion caused by mismatched transistor pairs
US6535040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2001 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Aug 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A duty cycle correction circuit includes a duty cycle corrector and a detection circuit. The duty cycle corrector generates a first input signal having a second duty cycle with a higher degree of equivalence than the first duty cycle in response to a first detection signal and a first control signal having a first duty cycle. The detection circuit generates the first detection signal in response to the first input signal. The detection circuit includes a current source having first and second current sources and a bias circuit that is electrically coupled to the first and second current sources and controls a bias of the first and the second current sources responsive to the first input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.