Method of controlling a memory cell refresh circuit using charge sharing
US6535445B1 · kind B1 · utility
3Cited by
5References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 3, 2001 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Jan 3, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus configured to generate a signal used to refresh a memory cell in response to (i) a write signal, (ii) a global wordline signal, (iii) a block select signal, and (iv) one or more supply voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.