Semiconductor memory device having a refresh operation
US6535950B1 · kind B1 · utility
34Cited by
12References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2000 |
| Grant date | Mar 18, 2003 |
| Priority date | — |
| Expiry date | Mar 29, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device, such as a DRAM, which needs to be refreshed for retaining data, is provided with a storing portion for storing data therein, and a busy signal outputting portion outputting a busy signal during the refresh operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.