Poly-silicon thin film transistor having back bias effects and fabrication method thereof
US6537890B2 · kind B2 · utility
8Cited by
13References
8Claims
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Key dates
| Filing date | Jul 10, 2001 |
| Grant date | Mar 25, 2003 |
| Priority date | — |
| Expiry date | Jul 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6734
Abstract
A poly-silicon (poly-Si) thin film transistor (TFT) having a back bias effect is provided in order to enhance characteristics of a leakage current, a sub-threshold slope, and an on-current. The poly-Si TFT includes a glass substrate, an island type buried electrode pad formed of an conductive material on one side of the glass substrate where the back bias voltage is applied, a buffer layer formed of an insulation material on the whole surface of the glass substrate, and a poly-Si TFT formed on the upper portion of the buffer layer. A method of fabricating the TFT is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.